Report by Peter Titman describing the engineering behind EDSAC II, following his visit to Cambridge with Arthur Payman on 9th June. It was circulated by John Pinkerton, whose introductory memo is still attached.

Transcript :

From: Mr. Pinkerton
JMMP/JG
20th June, 1958.

To: Mr. Thompson, Mr. Caminer, Mr. Barnes, Mr. Lenaerts, Mr. Mann, Mr. Broido, Mr. Ferguson, Mr. Gosden, Mr. Payman, Mr. Bruce, Mr. Sylvester

I attach a report by Mr. Titman on the engineering features od the Cambridge EDSAC II machine, which is now in full operation. This should be read in conjunction with the note on the programming features of this machine, circulated by Mr. Payman and dated 17th June, 1958.

[Signature: J.M.M.P]

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PJT/JG
18th June, 1958/

1. The general logical features of EDSAC II have been described in the note on the colloquium given at Cambridge on 1st December, 1955. The aim of the following notes is to describe some of the engineering ideas which have been used in EDSAC II.

2. The Physical Layout
This has been made very compact. A plan sketch shows the general outline.
[DIAGRAM labelling Control Matrix, Plug connection and rack wiring, Store, Engineers monitor panel, Computing circuits, and Control Desk.]
The computing circuits are built up of plug in units these are large, of up to 50 valves. The unit channels are long, with Bulgin plug connections at one end, and are plugged lengthwise into the rack. This allows a great deal of circuitry to be plugged into a comparatively small rack area, and so reduces the length of interconnecting wiring. Forced air ventilation is used, with air blown in from the sides of the racks.
The basis for a unit has been taken to the digit. For example, one type of unit contains all of the arithmetic circuitry for one digit. The number of different kinds of unit has been kept to twelve. It is claimed that this type of unit construction enables faults to be localised easily by test programme, while still providing the advantage of frequently repeated units.

3. The Store
This is divided into two parts, a 1024 word store to which access is available for reading and writing, plus a 256 word fixed store. The fixed store is used for storing information required for subroutines, and can only be used for reading out.

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A more detailed description of the store is given in the notes on the colloquium referred to above. 
Confident current selection is not used in the storage matrix, which is effectively a single plane. Each 40 digit word is selected by a larger driving core in a selection matrix of 1024 cores. The reason for choosing this particular form of selection was that it was felt at the time that the store was designed, that the magnetic properties of the cores available would not permit coincident current selection to be used. This choice has permitted higher operating speeds than would be possible with a coincident current system, at the expense of increased complexity in the selection circuits. It is felt that the store is now extremely reliable, though minor teething troubles were encountered. There is a parity check on the output of the store, but there is some doubt as to whether this is justified, with the degree of reliability which has been attained.

4. The Control Matrix
All transfers and arithmetic operations in EDSAC II are carried out under control of a matrix of magnetic cores. Each core, on being switched provides one or more outputs, which each, in general, open a gate, allowing a transfer to take place between registers. There is an additional output which is used to change the number in the register selecting the core in the control matrix. This causes a second core to be selected, which in turn controls a transfer and selects another core in the control matrix. Thus a sequence of actions is built up, which together constitute the carrying out of a single order. The order itself merely selects the first core in a sequence, and the following steps in the sequence of operations for the order are decided by the matrix. In some cases conditional changes in the sequence comprising an order are permitted. This is carried out by providing more than one core for some steps. The choice of cores then depends on some other condition, represented by the output of a flip-flop. 
This system is used for every order in EDSAC II, even the simplest. Thus every order may be considered as a "micro programme". The individual steps in the micro programme are controlled by the wiring in the matrix, in some cases in conjunction with a condition, which may result from previous steps in the order. Thus an elaborate order code may be built up, providing complex operations in a single order, without adding to the complexity of the arithmetic circuits.
The control core matrix contains 1024 cores in 32 rows and columns. The cores are large, allowing approximately 40 turns to be wound on for each of the X and Y selection windings. The large core gives a readily detectable output with a 2 turn output winding. The cores, with the selection windings wired on, are encased in a plate of Araldite. Holes are drilled in the Araldite to allow the output windings to be wound on. This allows the output wires, which
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are robust, to be rethreaded, or altered, without damaging the selection wires, which are of fine wire.
With an order code of the size of that used in EDSAC II the output windings are exceedingly complex, and while it would be quite feasible to provide a different order code for a different machine, it would be a formidable task to make changes in an order code once installed. 

This system of control, using a single matrix, means that only one operation can be carried out at a time. For example, while a long arithmetic operation is being carried out, such as floating point addition, no other transfers, such as input or output, can take place. Renwick felt that in a future machine a greater degree of flexibility might be obtained by subdividing the control matrix, so that certain sequences might be carried out simultaneously.

5. Monitoring Facilities

The emphasis here has been on  separating the facilities required by the engineer, and those required by the operator. The only register displayed on the control panel is the sequence control register. It is found that this is seldom used and is to be removed. A monitoring panel showing the contents of every register, and of conditional flip-flops is mounted at the back of the machine. This is out of sight of the operators, but visible to an engineer working on the rack wiring.

A proportion of the possible combinations of order digits do not correspond to orders in the order code. When the machine encounters one of these combinations it punches out the contents of several selected registers and then stops. There is also a "report" key on the control panel, which makes the machine punch out the numbers which are in the registers at the instant the key is depressed. 

Another facility is that on the depressing the "trace" key on the control panel the machine punches out the last 47 jump orders. These are automatically stored as a permanent subroutine. This facility is more fully described in the companion report by Mr. Payman.

The "report" and "trace" facilities together with post mortem enable a programmer to inspect his programme, and to correct faults without needing to have continuous access to the machine. Used with test programmes these facilities have been found to help considerably in the location of faults.

6. Input and Output

Input and output are both by punched paper tape. A locally designed photo electric tape reader, with a speed of 1000 rows/sec. and a conventional

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tape perforator are used. A register of 1 word is used for buffer storage.

7. Magnetic Tape

Magnetic tape is used for auxilliary storage. The tape machine used is a direct ancestor of the current Decca model, and was first developed for EDSAC I. Transfer between tape and store is in variable length vlocks, a word at a time. Each block is labelled with a number indicating the number of words in the block. Only 1 word of intermediate storage is used, so the computer is concerned solely with the tape machine while transfers are carried out, and no other operations can be performed during this time.

8. The Circuit Design of Logical Elements.

There is a bias against the use of diodes in EDSAC II, the feeling being that diodes tend to be unreliable when used in close proximity to valves. The basic logical element is a flip-flop, with more than one input, a separate triggering valve being used for each input. All logic is purely D.C. connected, and both zero and one outputs are used in every case. Input waveforms are applied to both the set and reset terminals of the flip-flops making up a register. One of these waveforms will be "up" and the other "down". Therefore the final state of the register will depend only on the input waveforms, and the need to clear the register before filling it is avoided. Thus in order to transfer a number for one register to another two sets of gates are opened, connecting the zero and one outputs from the first register to the reset and set terminals respectively of the second register. This eliminates the time and logical circuitry required in order to clear a register before using it.

Diodes are used for some of the preliminary decoding in the selection of cores in the store and control matrices, and in the gating of inputs to the store register. For other gating 12AT7 valves are used. All the coding required to produce controlling waverforms is carried out in the control matrix. The use of matrix selection in both control matrix and store reduces the number of diodes required for decoding.

[signature]

Provenance :
From David Caminer's papers.