Designing with the IMS T414 and IMS T800 memory interfaces

Tony Gore and David Cormie

25 pages.

1. Overview of the memory interface
1.1 Memory interface timing
1.2 Early and late write
1.3 Refresh
1.4 Wait states and extra cycles
1.5 Setting the memory interface configuration
1.6 The memory interface program
2. Basic considerations in memory design
2.1 Minimum memory interfacy cycle time
2.2 Delay and skew
2.3 Ringing
3. Worked example
3.1 Choose memory device size
3.2 Choose RAS duty cycle
3.3 Allocate strobes
3.4 Address decoding
3.5 Loading considerations
3.6 Address latching and multiplexing
3.7 Evaluate DRAM timing
3.8 Choose write mode
3.9 Choose refresh interval
3.10 Timing for other memory and peripherals
3.11 Summary of design steps
4 Further examples
4.1 Minimum component, 256kbyte memory
4.2 DRAM only: 1 Mbyte
4.2 Fast static memories
5. Debugging memory systems
5.1 Peeking and poking
5.2 Investigation of memory timing
6. Summary

Reference Number :

Date Published : April 1987

Manufacturer : INMOS

Platform : Transputer