Digital - PDP11 Peripherals Handbook (1975)

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PDP11 Perpherals Habdbook 1975

Ref:2002.20175.4526RD.09.40

Table of Contents

Chapter 1 Introduction

1.1 Scope and Contents

1.2 Peripheral Equipment

1.3 PDP-11 Equipment Philosophy

1.4 Central Processor

1.5 UNIBUS

1.6 Software

1.7 PDP-11 Word

Chapter 2 Programming

2.1 General

2.2 Addresses

2.3 Device Registers

2.4 Processor Registers

2.4.1 General Registers

2.4.2 Processor Status Word

2.5 Interrupt Structure

2.6 Programming with Device Registers

2.7 Device Priority

Chapter 3 Categories of Peripherals

3.1 General

3.2 Main Memory

3.3 Terminals

3.4 Paper Tape

3.5 Cards

3.6 Printers

3.7 Magnetic Tape

3.8 Disks

3.9 Displays

3.10 Communications

3.11 Data Acquisition

3.12 UNIBUS Equipment

3.13 Mounting Equipment

Chapter 4 Descriptions of Peripherals

4.1 Introduction

4.2 Explanation of Terms and Specifications

4.2.1 Products

4.2.2 Registers

4.2.3 Specifications

4.2.4 Conversion Factors

4.3 List of Peripherals

  Digital to Analog Subsystem, AA11-D

  Analog to Digital Subsystem, AD01-D

  Low Level Analog Input Subsystem, AFC11

  Analog Real-Time Module, AR11

  Expansion Mounting Chassis, BA11-K

  Blank Mounting Panel, BB11

  Read Only Memory (ROM), BM792, MR11, M792

  Restart/Loader, BM873

  High-Speed Punched Card Reader, CD11

  Punched Card Reader, CR11, and Mark Sense Card Reader, CM11-F

  UNIBUS Link, DA11-B

  UNIBUS Window, DA11-F

  Bus Repeater, DB11-A

  Peripheral Mounting Panel, DD11

  Acoustic Telephone Coupler, DF01-A

  Serial Line Interface Signal Conditioning, DF11

  16-Line Programmable Asynchronous Serial Line Multiplexer, DH11

  16-Line Asynchronous Serial Line Multiplexer, DJ11

  Single Asynchronous Serial Line Interfaces, DL11

  Serial Line Interface, DL11-W

  DMC11

  Automatic Calling Unit Interface, DN11

  NPR Synchronous Line Interface, DQ11

  Direct Memory Access Interface, DR11-B

  General Device Interface, DR11-C

  General Device Interface, DR11-K

  UNIBUS Switch, DT03-F

  Synchronous Line Interface, DU11

  Synchronous Line Interface, DUP11

  Synchronous Preprocessor, DV11

  Graphic Display System, GT40

  Asynchronous Null Modem, H312-A

  Standard PDP-11 Cabinet, H960

  Extended Arithment Unit (EAE), KE11

  Communications Arithmetic Option, KG11-A

  Line Time Clock, KW11-L

  Programmable Real-Time Clock, KW11-P

  DECwriter II Printer, LA35

  DECwriter II Printer Terminal, LA36

  DECprinter I, LA180

  High-Speed Line Printer, LP11

  Lab Peripheral System, LPS11

  Electrostatic Printer/Plotter, LV11

  High Speed Paper Tape Reader/Punch, PC11 (PR11)

  Disk Pack, RJP04 (RP04)

  Fixed-Head Disk, RJS04 & RJS03 (RS04, RS03)

  DECpack Disk Cartridge, RK11-D (RK11, RK05)

  Disk Pack, RP11-C

  Floppy Disk System, RX11

  Tape Cassette, TA11

  DECtape, TC11-G (TC11, TU56)

  Magnetic Tape System, TJU16 (TU16)

  Magnetic Tape, TM11 (TU10)

  Magnetic Tape, TS03

  Universal Digital Control Subsystem, UDC11

  Oscilloscope, VR01-A

  Point Plot Display, VR14

  Storage Display, VT01-A

  Alphanumeric Terminal, VT05B (VT05)

  Video Display Terminal, VT50

  DECscope Video Display Terminal, VT52

Chapter 5 UNIBUS Theory and Operation

5.1 Introduction

5.1.1 Single Bus

5.1.2 UNIBUS Lines

5.1.3 Master-Slave Relation

5.1.4 Interlocked Communication

5.2 Peripheral Device Organization and Control

5.3 Transfer of Bus Master

5.3.1 Transfer Request Handling

5.3.2 Priority Structure

5.3.3 Data Transfer

5.3.4 Interrupt Requests

5.3.5 Interrupt Procedure

5.4 UNIBUS Signal Lines

5.5 Data Transfer

5.5.1 Signals used in Data Transfer

5.5.2 Conventions and Definitions

5.5.3 Equivalent Logic at the Slave

5.5.4 Data Transfer Timing

5.5.5 DATA-IN, DATI or DATIP

5.5.6 DATA-OUT, DATO or DATOB

5.6 Priority Arbitration Transactions

5.6.1 Introduction

5.6.2 Detailed Description, Priority Arbitration Transactions

5.6.3 Detailed Description, NPR Arbitration Sequence

5.6.4 General Description, Interrupt Transaction

5.6.5 Detailed Description, BR Interrupt Arbitration Sequence

5.7 Miscellaneous Control Lines

5.8 UNIBUS

5.8.1 Timing

5.8.2 Time-Out Protection

5.8.3 Priority Chaining

5.8.4 Address Mapping

5.8.5 Device Registers

5.9 Comparison Between NPR & BR Operation

Chapter 6 UNIBUS Interfacing

6.1 General

6.1.1 UNIBUS Transmission

6.1.2 UNIBUS Signal Levels

6.1.3 Bus Receiver and Transmitter Circuits

6.1.4 UNIBUS Length and Loading

6.2 UNIBUS Interface Modules

6.2.1 BC11A, UNIBUS Cable

6.2.2 M105 Address Selector Module

6.2.3 M783 UNIBUS Transmitter Module

6.2.4 M784 UNIBUS Receiver Module

6.2.5 M785 UNIBUS Transceiver Module

6.2.6 M795 Word Count and Bus Address Module

6.2.7 M796 UNIBUS Master Control Module

6.2.8 M920 UNIBUS Jumper Module

6.2.9 M930 UNIBUS Terminator Module

6.2.10 M7820 Interrupt Control Module

6.2.11 M7821 Interrupt Control Module

Chapter 7 Interface Examples

7.1 Basic Interface

7.1.1 Interface Operation

7.1.2 Data Transfer Operation

7.1.3 Circuit Implementation

7.1.4 Programming the Interface

7.2 Programmed Device Interface

7.2.1 Analog-to-Digital Converter

7.2.2 Interface Operation

7.2.3 Transfer Operations

7.2.4 Circuit Implementation

7.2.5 Programming the Interface

7.3 Interrupt Serviced Interface

7.3.1 Interface Description

7.3.2 DR11-C Implementation

7.3.3 Interface Programming

7.4 Direct Memory Access (DMA) Interface

7.4.1 Interface Description

7.4.2 Interface Implementation

7.4.3 Programming the Interface

7.4.4 Interface Operation Timing

7.4.5 Interface Options

7.5 Output Interface with Interrupt Control

7.5.1 Device Description

7.5.2 Interface Description

7.5.3 Interface Operation

7.5.4 Interface Programming

7.6 DAC-DMA Interface

7.6.1 Interface Description

Appendix A UNIBUS Addresses

A.1 Interrupt & Trap Vectors

A.2 Floating Vectors

A.3 Floating Addresses

A.4 Device Addresses

A.5 Address Map

Appendix B Miscellaneous Tables and Data

B.1 UNIBUS Pin Assignments (by pin numbers)

B.2 UNIBUS Pin Assignments (by signal name)

B.3 BB11 Power Pin Assignments

B.4 ASCII Code

B.5 Paper Tape Format

Appendix C - Summary of PDP-11 Instructions

Appendoix D - PDP-11 Assembly Language

Appendix E - Summary of Equipment Specifcations & Index

Thank you to http://vt100.net/manx/details/1,3266 for the bulk of the information above.

We are extremely grateful for this donation from David W Griffiths BSc (Eng) CEng Miee.
Quotation from David Griffiths:
"I believe we had the first PDP11 in Central Africa (Zambia to be exact) where it formed part of a remote control system by Brown Boveri, one of the forerunners of ABB.  In 1975 I spent 6 weeks in Switzerland on a training course on the hardware and software (the location in Zambia being too remote to rely on outside help in emergency).  The system entered full service in 1976."

 

 

 

 

ISBN :

Publisher : Digital Equipment Limited

Author :

Format : Paperback

This exhibit has a reference ID of CH15842. Please quote this reference ID in any communication with the Centre for Computing History.
 
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